simple recursive Makefile example

./Makefile

SUBDIR=sub

.PHONY: clean clean-am
clean:
list="$(SUBDIR) ."; \
target=`echo $@ | sed s/-recursive//`; \
for subdir in $$list; do \
if test "$$subdir" = "."; then \
local_target="$$target-am"; \
else \
local_target="$$target"; \
fi; \
(cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target); \
done
clean-am:
-rm -rf .libs
-rm -f .o

sub/Makefile

.PHONY: clean
clean:
-rm -rf .libs


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Some curious question
* what is the different between the $variable-name and $$variable-name
ans:
The GNU make works in two distinct phases: a read-in phase and a target-update phase, so we must use double $ to expand the variable value

Refer the GNU make processing logic (a snapshot from the GNU make manual)
3.9 How make Reads a Makefile

GNU make does its work in two distinct phases. During the first phase it reads all the makefiles, included makefiles, etc. and internalizes all the variables and their values, implicit and explicit rules, and constructs a dependency graph of all the targets and their prerequisites. During the second phase, make uses these internal structures to determine what targets will need to be rebuilt and to invoke the rules necessary to do so.

* You can use $(variable-name), but you can not use $$(variable-name) or will due to error because the gnu make doesn't know how to immediately expansion in the first read-in phase